Product properties:
TYPE | DESCRIBE |
category | Integrated circuit (IC) Embedded FPGA (Field Programmable Gate Array) |
manufacturer | AMD Xilinx |
series | Automotive, AEC-Q100, Spartan®-6 LX XA |
package | tray |
Product status | On sale |
LAB/CLB number | 3411 |
Number of logical elements/cells | 43661 |
Total RAM bits | 2138112 |
I/O number | 316 |
Voltage-power supply | 1.14V ~ 1.26V |
Installation type | Surface mount type |
Working temperature | -40°C ~ 100°C(TJ) |
Package/housing | 484-BBGA |
Supplier device package | 484-FBGA(23x23) |
Basic product number | XA6SLX45T |
Environment and export classification:
ATTRIBUTE | DESCRIBE |
RoHS status | Comply with ROHS3 specification |
Moisture sensitivity level (MSL) | 3(168 hours) |
REACH status | Non-REACH products |
ECCN | 3A991D |
HTSUS | 8542.39.0001 |
XA6SLX45T Switching Characteristics
All values represented in this data sheet are based on these
speed specifications: v1.20 for -3, -3N, and -2; and v1.08 for
-1L. Switching characteristics are specified on a per-speedgrade basis and can be designated as Advance,
Preliminary, or Production. Each designation is defined as
follows:
Advance
These specifications are based on simulations only and are
typically available soon after device design specifications
are frozen. Although speed grades with this designation are
considered relatively stable and conservative, some underreporting might still occur.
Preliminary
These specifications are based on complete ES
(engineering sample) silicon characterization. Devices and
speed grades with this designation are intended to give a
better indication of the expected performance of production
silicon. The probability of under-reporting delays is greatly
reduced as compared to Advance data.
Production
These specifications are released once enough production
silicon of a particular device family member has been
characterized to provide full correlation between
specifications and devices over numerous production lots.
There is no under-reporting of delays, and customers
receive formal notification of any subsequent changes.
Typically, the slowest speed grades transition to Production
before faster speed grades.
All specifications are always representative of worst-case
supply voltage and junction temperature conditions.
Since individual family members are produced at different
times, the migration from one category to another depends
completely on the status of the fabrication process for each
device.
The -1L speed grade refers to the lower-power Spartan-6
devices. The -3N speed grade refers to the Spartan-6
devices that do not support MCB functionality.
Table 26 correlates the current status of each Spartan-6
device on a per speed grade basis.
Testing of Switching Characteristics
All devices are 100% functionally tested. Internal timing parameters are derived from measuring internal test patterns. Listed
below are representative values.
For more specific, more precise, and worst-case guaranteed data, use the values reported by the static timing analyzer and
back-annotated to the simulation net list. Unless otherwise noted, values apply to all Spartan-6 devices.
IOB Pad Input/Output/3-State Switching Characteristics
Table 28 (for commercial (XC) Spartan-6 devices) and Table 29 (for Automotive XA Spartan-6 and Defense-grade Spartan-6Q devices) summarizes the values of standard-specific data input delays, output delays terminating at pads (based on standard), and 3-state delays. • TIOPI is described as the delay from IOB pad through the input buffer to the I-pin of an IOB pad. The delay varies depending on the capability of the SelectIO input buffer. • TIOOP is described as the delay from the O pin to the IOB pad through the output buffer of an IOB pad. The delay varies depending on the capability of the SelectIO output buffer. • TIOTP is described as the delay from the T pin to the IOB pad through the output buffer of an IOB pad, when 3-state is disabled. The delay varies depending on the SelectIO capability of the output buffer. See the TRACE report for further information on delays when using an I/O standard with UNTUNED termination on inputs or outputs.